Aug
25
2016

Dave Kelf, OneSpin & DVCon India countdown

We are glad to bring our next issue of this popular DVCon countdown series with Dave Kelf, VP of Marketing at OneSpin solutions.       Counting Down To DVCon India Below is a brief chat with Dave Kelf (DK),t hat our VerifNews (VN) team recently held: [VN] Can you share your experience with DVCon in general […]

Aug
25
2016

Debug automation: PinDown gets to file-level granularity in isolating bugs

Debug is one area that requires automation much more than available today. With Verdi’s NPI and emerging DDI (Debug Data Interface) becoming popular, third party “apps” to solve common debug problems are emerging fast in the market (e.g. RTGen from VerifWorks). One of the common tasks for regression analysis teams is to quickly narrow down […]

Aug
18
2016

Louie De Luna & DVCon India 2016 countdown

Listen to Mr. Louie De Luna, Director of Marketing at Aldec Inc. USA on his views on upcoming DVCon India 2016. As some of our readers are familiar by now, Aldec has been conducting series of webinars and seminars on the DV space for many years now. Aldec is also hosting 2 separate seminars early […]

Aug
11
2016

Hardware-Assisted Verification – Free Seminar Bangalore

 Aldec, Inc., an industry-leading Electronic Design Automation (EDA) company is glad to host a technical seminar on “Hardware-Assisted Verification” in Bangalore, India on Sep 08, 2016. The full-day event has multiple high-profile speakers from the industry and academia: More details and registration link can be found at: https://www.aldec.com/en/events/736 It is FREE of cost, but registration […]

Aug
02
2016

Jinnan Huang – DVCon India 2016 countdown

Listen to Mr. Jinnan Huang, R&D Manager at Synopsys Shanghai, China on his views on upcoming DVCon India 2016. As some of our readers are familiar by now, DVCon is entering China in 2017 and Mr. Jinnan is playing a key-role in that event by serving as Tutorial Committee Chair for DVCon China 2017. As an expert […]

Jul
30
2016

DVCon enters China in 2017!

huanying – 欢迎 – huānyíng DVCon is going places indeed – semiconductor industry’s most popular industry event focusing on Design & Verification has been a regular event in the US for many years. To learn more about the history of this event, see: History of DVCon, DVCon India Back in 2014 Accellera worked with key industry stakeholders […]

Jun
21
2016

DVCon India 2016 – curtain raiser

Welcome to VerifNews Readers! The clock is ticking: Counting Down To DVCon India We had a great start to DVCon India in 2014. Here is an article we did on the history of DVCon India – History of DVCon, DVCon India That’s wonderful, one-off success, maybe? We had a second time success in DVCon India 2015 – it […]

Jun
13
2016

DVTalk on SystemVerilog Assertions & UVM at BMS College, Bangalore

Our next DVTalk event will be held at BMS college of Engineering, Bangalore.  BMS is holding a 3-day hands-on workshop on “Advances in Verification Methodologies” from Jun 13-15 2016. VerifWorks will be delivering a session on SystemVerilog Assertions and Go2UVM traces for assertions. Complete agenda is below:

Feb
25
2016

DVCon 2016 is next week – preview of our contributions

DVCon 2016 is next week – preview of our contributions The primary annual technical carnival of the VLSI & EDA industry focusing on front-end design is DVCon. Since its inception several years ago (a very good history of DVCon is at: DVCon History), DVCon has spread its wings across the globe with India and EU editions […]

Feb
24
2016

Debug Data API Debut Meeting March 1st 

Message from Adam Sherer, Cadence on Debug-Data API meeting @DVCon US Fittingly, our first working proof of concept will happen on March 1st.  We will have a meeting of Debug Data API interested folks attending DVCon U.S. From 5:15p to 5:45p on Tuesday March 1st in the Fir Ballroom at the DoubleTree Hotel in San […]



© 2014 Verifnews All rights reserved.
Designed By SCSVMV University