Functional verification is becoming a bottleneck and is affecting all design teams. It’s in a chip’s best interest that you as a design engineer make an effort to boost verification productivity. Here, we provide 10 simple tips that will significantly boost your IP verification productivity.
Arrow Devices offers 10 Tips for Design Teams To Boost Verification Productivity
Go2UVM.org, the premier UVM learning site has published a handy quick start guide to UVM register modelling for standard IPs. It also promises to make available to users a series of UVM Register mode...Read more
Industry bodies keep updating protocols specifications from time to time. While these changes are forward looking, they result in some amount of anxiety in design and verification engineers. What are ...Read more