To meet the low-power, performance and functionality demands of advanced electronics products, virtually every SoC designed today is a multicore SoC. In this environment, on-chip cache memory plays a critical role, as memory architecture is fundamental in determining system performance.Historically, CPU speed has outpaced memory speed. This performance gap led to the use of on-chip cache memory in single-processor systems to prevent the CPU from having to wait for instructions and data from memory. However, in a multicore SoC, individual cores must access and share data across the entire chip.
Verifying ARM AMBA® 5 CHI Interconnect-Based SoCs Using Next-Generation VIP
Breker Ships First TrekApp for Verification of System-Level Cache Coherency – The Breker Buzz, October, 2014
Breker Ships First TrekApp for Verification of System-Level Cache Coherency Breker is the first to market with an app application to address the verification challenges of cache-coherent multiprocess...Read more
Date: Nov 17, 2014 12:00 PM - 1:00 PM US/Pacific Location: Fremont, CA - USA Register at: http://go.mentor.com/3ulv4 Mentor Graphics CSI-2 and DSI QVIP provides comprehensive protocol s...Read more