Universal Verification Methodology Multi-Language UVM-ML provides a modular solution for integrating verification components written in different languages into a unified and coordinated verification environment. It consists of an open source library that enables such integrations, and can be extended to support additional languages and methodologies.This release of the UVM-ML implementation is the result of collaboration work between Advance Micro Devices, Inc., and Cadence Design Systems, Inc. It expands on the mature technology provided by Cadence in Incisive and in previous UVM-ML postings on UVMWorld. It is provided as open source under the Apache 2.0 license.This distribution includes the following main elementsBackplane implementation and APIExample frameworks and adapters three provided: UVM-SV, UVM-e, and UVM-SCSeveral demos and high level examples showing all frameworks interacting and a few smaller feature examples testsDocs directory with a Quick-Start, User Guides, and reference HTML docs

via UVM-ML Open Architecture – Accellera Systems Initiative Forums.