Validation and Verification Process for DO-254
Randall Fulton, FAA Consultant DER
Requirements are central to the development process described in DO-254. The Validation and Verification Process ensures that requirements are correct, complete, verifiable, unambiguous, logically consistent, the design data correctly implements the requirements and the final FPGA functions as intended as defined in the requirements. Learn in this webinar the objectives, purpose and methods of Validation and Verification. The webinar will describe the validation and verification process and techniques for selected example requirements.
• Validation Process for derived requirements
o Derived requirements
o Validation method
o Validation standards
• Verification Process for functional requirements:
o FPGA functional requirements
o Verification method
o Verification standards
The Verification Spectrum
Typically, verification teams develop separate flows to support verification at block and SoC levels. As well as supporting reuse between these different abstraction level...
The Club Formal - Jasper User Group (JUG) Conference held on Dec 18, 2014 at Aloft Hotel, brought together designers, verification engineers, and engineering managers for a full day of learning, shari...