High quality quarterly newsletter from Mentor Graphics covering deep Functional Verification topics such as:

  • Integrate Ethernet QVIP in a Few Hours: an A-to-Z Guide –
  • Fast Track to Productivity Using Questa VIP -Takes you through a new set of productivity features that we’ve named“EZ-VIP” that provides predefined sequences,configuration objects and wrapper modules to function as a “Quick Starter Kit” to help you get up and running quickly to verify standard design IP for popular protocols like PCIe and AXI4.
  • Cache-Coherent Interface Verification IP – Extends the EZ-VIP discussion to focus on the use generic read/write APIs for ARM® AMBA® cache-coherent protocol verification.
  • How Design Engineers Can Get Verification Engineers to Stop Complaining, and Other Advice – Somewhat irreverent and refreshingly candid advice for design engineers to help them avoid some of themore common pitfalls that cause tension between design and verification teams.
  • Please! Can Someone Make UVM Easier to Use? – Best Poster Award-winner at DVCon India.
  • A series of “before” and “after”code examples to show you how to use just the right set of features in UVM to make your code clear, concise and easy to debug.
  • Controlling On-The-Fly Reset in a UVM-Based AXI Testbench Environment -How to handle resets and re-generate DUT traffic in UVM without using phase jumping.
  • Increase Verification Productivity with Questa UVM Debug – Shows you how to take advantage of the UVM-specific debug features built into Questa to maximize your visibility into your UVM testbench.

via Latest Issue of Verification Horizons Available! « Verification Horizons BLOG.