ipsocdays

– Bangalore, 2015 : Highlights

                    

designreuse– an EDA portal based out of Europe has been successfully running its “IP-SOC Days” for the past several years across the world. This year the Bangalore edition was held at the Park Plaza, ORR, Bangalore on March 25, 2015. Surprisingly not so well marketed on social media, this marketing & technical event still attracted good crowd and impressive set of sponsors, exhibitors. This year one of their founders, Dr. Gabriele Saucier herself was leading the event co-ordination from the front. It was amazing to see such enthusiasm and leadership from this long time EDA veteran

.D_and_R_saucierbig  Dr. Gabriele Saucier

 

Several Verification engineers from CVC attended the event.

As a valued service to the entire Verification community, our VerifNews team captured the details during this event and we will be reporting it as series of blogs here. The detailed agenda, speakers, bios, topics are available at: http://www.design-reuse.com/ipsocdays/bangalore/

 

The new IP vendors that caught our attention are:

  • S3Craft, developing DDR controllers:   s3craft
  • Krivi Semiconductors, DDR PHY       krivi
  • Silabtech                                          silabtech
  • Mobiveil:                                         mobiveil
  • 3D-IP Semiconductors                      3dipsemi

The fresh stream of IP companies, started mostly by first time entrepreneurs coming out of large MNCs is a very encouraging sign indeed. Even more encouraging was the partnership model of development among these companies. For instance the S3Craft folks are developing DDR Controller and have partnered with Krivi who develops DDR PHY IP to offer end users a complete solution. For those who have been tracking Indian VLSI ecosystem for a while, this is a fresh, encouraging signal indeed as this would lead to larger design wins for the combined IP ecosystem as a large, yet enabling small IP players to stay focused on their individual strengths.

In our next, follow-up blog entry, we will summarize the discussion happened at a panel during this event. So stay tuned to http://www.VerifNews.org

 

Meanwhile below is a quick grab from Twitter on this event:

https://twitter.com/sricvc/status/580701062010634240

Srinivasan V ‏@sricvc  Mar 25

We missed you @ArrowDevices at @designreuse IP-SoC day today. Few mentions of your names at other booths I heard. #semiEDA

https://twitter.com/sricvc/status/580734368940871681

Srinivasan V ‏@sricvc  Mar 25

Saw Visualizer Debug env from @mentor_graphics Questa platform at @designreuse IP-SoC event. Good to see modern debug becoming mainstream

Srinivasan V ‏@sricvc  Mar 25

Gabriele Saucier of @designreuse introducing Sajish of S3craft at IP-SoC day Bangalore

https://twitter.com/sricvc/status/580666128411693056

Krivi has DDR PHY IP analog IP. Has 22 clock domains..what kind of CDC challenges he had to face, impressive @designreuse IP-SoC day

https://twitter.com/sricvc/status/580665552932212736

Srinivasan V ‏@sricvc  Mar 25

Nidhi Kumar from Krivi presenting at @designreuse IP-SoC day at Bangalore

https://twitter.com/sricvc/status/580664987309359104

Srinivasan V ‏@sricvc  Mar 25

Bhaskar, Sajish, Rama of S3Craft in their booth at @designreuse IP-SoC day in Bangalore

https://twitter.com/sricvc/status/580664500296142849

Srinivasan V ‏@sricvc  Mar 25

Srini from Mobiveil India presenting his IP journey at @designreuse IP-SoC day in Bangalore @Mobiveil

 

In our next, follow-up blog entry, we will summarize the discussion happened at a panel during this event. So stay tuned to http://www.VerifNews.org