Benefits of native UVM VIP    UVM_Logo

Srinivasan Venkataramanan, Chief Editor, http://www.VerifNews.org

Shankar Hemmady

Ever since the birth of Accellera UVM standard (and now on its way to becoming an IEEE 1800.2 standard), several companies have announced Verification Intellectual Properties (VIPs). The primary objective of UVM standardization committee was to develop a set of base classes and API so that the industry can create truly interoperable VIPs.

 Fast forward to 2014-15, we see several VIPs that are UVM compatible and that’s good news for end users indeed. While the UVM committee did deliver well on its agenda, the usage scenario has shown some interesting twists. In this series of blogs we will elaborate on the good and ugly side of this adoption from a VIP perspective.

First of all, UVM is adopted very well – undoubtedly the most adopted verification standard. So more and more users are heavily trusting and relying on the true UVM nature of these VIPs. The concept of a VIP is not new; it has been around for many years before UVM. For instance, there have been VIPs written using various languages and methodologies including (not necessarily an exhaustive list):

  • Verilog
  • VHDL
  • OpenVera & RVM
  • e, IEEE 1647 (Specman) & eRM
  • C (through VPI)
  • C++
  • SystemC etc.

But what UVM in its true, native form offers is the real ease of use, plug-and-play, seamless configuration changes to user requirements, adopting to different testcase requirements without having to change the underlying VIP code etc.

Now given the history of VIPs, some of the current VIP offerings are merely a UVM disguise than real, native UVM based. To peal the onion a bit deeper, under the hood it is the same old Verilog/C/C++/E/OpenVera based VIP with a so-called “gasket” layer or “wrapper” around.

disguise

This is somewhat understandable from the VIP (and EDA) vendors’ perspective, as they would like to leverage their engineering efforts put on those VIPs. However from an end user perspective it is a dark secret during the pre-sales phase of VIP purchase and something that shows its ugly head when it gets to hands-on user adoption.

 Some of the key advantages of native UVM as opposed to those “disguised” ones are:

  1. Seamless use model, tool flow
  2. Significant performance gains
  3. Easy and guaranteed configuration mechanisms
  4. Unified debug in single view with single language semantics to remember
  5. Portability across platforms, tools etc.

In the next series of articles we will delve into details of each of these topics. So stay tuned to VerifNews.org