Listen to Mr. Jinnan Huang, R&D Manager at Synopsys Shanghai, China on his views on upcoming DVCon India 2016. As some of our readers are familiar by now, DVCon is entering China in 2017 and Mr. Jinnan is playing a key-role in that event by serving as Tutorial Committee Chair for DVCon China 2017. As an expert in debug and related technologies in the DV space, Jinnan has deep knowledge about this domain and we are glad to be able to continue our DVCon countdown series with him! Below is a brief chat with Mr. Jinnan Huang (JH) that our VerifNews (VN) team recently held:

[VN] Can you share your experience with DVCon in general please?

[JH] DVCon is a wonderful conference for design and verification. And the tutorials are most interesting to me. ([VN]: Not surprising, that’s perhaps why he is chosen to chair the Tutorial Committee in DVCon China 2017).

[VN] What would like to see/add to DVCon-India?
[JH] I would like see more sharing and discussion among experts to generate sparks of innovation.

[VN] How do you find the Design-Verification community in India? And how do you keep track of events across countries?

[JH] I use SNUG (Synopsys User Group) and LinkedIn groups to stay connected.

[VN] What are your views on this year and next year growth about semiconductor industry? India in particular?
[JH] The global semiconductor industry may be steady and grow slowly in 2 years, while the Indian semiconductor will grow much faster with the huge local market and local talents/government support.

[VN] It is pleasure having you speak to us Jinnan on DVCon India 2017. We will soon catch up on DVCon China with you from our VerifNews team! Thanks for your time and support.

Brief Bio of the speaker: 


Jinnan Huang, 16 years of EDA software development experience in Synopsys and Avant!, focusing on debug methodology of front-end design and verification.