VLSI Design-Verification as a field is booming over the last decade. More so with the advent of UVM (Universal Verification Methodology) as a standard from Accellera back in early 2000-s. UVM has grown leaps and bounds and has been adopted by almost every ASIC design team across the globe. Growth of industries like IoT, automobile […]
Category: Conferences
DVTalk – Apr’18: VLSI Career workshop, IEEE UVM and more
Our next episode of DVTalk is here! Welcome to DVTalk April-2018. In this episode we are thrilled to partner with leading VLSI & EDA companies and standard committee to bring you the latest in this field. It is free to attend, but registration is mandatory. As seats gets filled quickly, we suggest you register right-away […]
Hardware-Assisted Verification seminar – Aldec, CVC & IISc – notes
Aldec, Inc., an industry-leading Electronic Design Automation (EDA) company recently hosted a technical seminar on “Hardware-Assisted Verification” in Bangalore, India on Sep 08, 2016. The full-day event had multiple high-profile speakers from the industry and academia: Below is a brief summary of the day’s proceedings as captured by our team member! Introduction to Hardware Assisted […]
Anupam Bakshi & DVCon India countdown with Ajeetha
DVCon India is being organized for third year in a row. It has been made possible thanks to some dedicated hard-work by passionate leaders in this industry. One of the key members of DVCon India team since 2014 is Anupam Bakshi, CEO at Agnisys, an EDA company focusing on executable specifications, automated code generation and […]
Tom Anderson & DVCon India countdown
DVCon India has made deep connections worldwide since its inception back in 2014. One of our friends who has helped the show time and again is Tom Anderson. We are glad to bring our next issue of this popular DVCon countdown series with Tom Anderson, VP of Marketing at Breker Systems Counting Down To DVCon […]
DVTalk Aug 2016 – VLSI industry & UVM adoption
VerifNews is glad to announce a new #DVTalk session titled: VLSI industry & UVM adoption Brief agenda: 1. VLSI industry overview . 2. UVM apps and open-source approach (Courtesy: www.go2uvm.org) 3. Hidden gems of UVM debug This is an exclusive DVTalk event being held at Amrita Bengaluru Campus. Date: Aug 31st 2016 Time: 10.30-12.30 Stay tuned for event […]
Karen Bartleson, IEEE president-elect 2016 & DVCon India countdown
Literally everyone in the electronics industry is aware of IEEE. Though may not have been deeply involved, for sure every electrical, electronics engineer’s professional life has been touched by IEEE. IEEE is the world’s largest technical professional organization dedicated to advancing technology for the benefit of humanity. As many would know, Karen Bartleson is becoming […]
Dave Kelf, OneSpin & DVCon India countdown
We are glad to bring our next issue of this popular DVCon countdown series with Dave Kelf, VP of Marketing at OneSpin solutions. Counting Down To DVCon India Below is a brief chat with Dave Kelf (DK),t hat our VerifNews (VN) team recently held: [VN] Can you share your experience with DVCon in general […]
Louie De Luna & DVCon India 2016 countdown
Listen to Mr. Louie De Luna, Director of Marketing at Aldec Inc. USA on his views on upcoming DVCon India 2016. As some of our readers are familiar by now, Aldec has been conducting series of webinars and seminars on the DV space for many years now. Aldec is also hosting 2 separate seminars early […]
Hardware-Assisted Verification – Free Seminar Bangalore
Aldec, Inc., an industry-leading Electronic Design Automation (EDA) company is glad to host a technical seminar on “Hardware-Assisted Verification” in Bangalore, India on Sep 08, 2016. The full-day event has multiple high-profile speakers from the industry and academia: More details and registration link can be found at: https://www.aldec.com/en/events/736 It is FREE of cost, but registration […]