Sep
10
2016

Hardware-Assisted Verification seminar – Aldec, CVC & IISc – notes

Aldec, Inc., an industry-leading Electronic Design Automation (EDA) company recently hosted a technical seminar on “Hardware-Assisted Verification” in Bangalore, India on Sep 08, 2016. The full-day event had multiple high-profile speakers from the industry and academia: Below is a brief summary of the day’s proceedings as captured by our team member! Introduction to Hardware Assisted […]

Aug
11
2016

Hardware-Assisted Verification – Free Seminar Bangalore

 Aldec, Inc., an industry-leading Electronic Design Automation (EDA) company is glad to host a technical seminar on “Hardware-Assisted Verification” in Bangalore, India on Sep 08, 2016. The full-day event has multiple high-profile speakers from the industry and academia: More details and registration link can be found at: https://www.aldec.com/en/events/736 It is FREE of cost, but registration […]

Jun
08
2015

Synopsys buys Atrenta, builds on Verification Continuum

Around the industry’s most popular event, there is a BIG news for the VLSI/ASIC Design & Verification industry: Synopsys buys Atrenta:       As part of Synopsys’s new initiative to deliver a “Verification Continuum” (as reported by our VerifNews team at recent DVCon USA 2015, http://verifnews.org/2015/03/synopsys-sees-a-major-shift-left-approach-to-verification-at-dvcon-us-2015/) this is a very strong, bold and useful step for its […]

Nov
21
2014

New IP Prototyping Kits for 10 Interface Protocols

DesignWare IP Prototyping Kits for 10 Interface ProtocolsAccelerate Prototyping, Software Development and Integration of USB 3.0, SSIC, PCI Express 2.0 & 3.0, DDR3, LPDDR3, LPDDR2, MIPI CSI-2, HDMI 2.0, and JEDEC UFS Protocols IP into SoCs via New IP Prototyping Kits for 10 Interface Protocols.

Nov
16
2014

Efficient Verification and Virtual Prototyping of Analog and Mixed-Signal IP and SOCs Using Behavioral Models » AnySilicon

This paper describes the use of behavioral models and mixed-signal simulation as a means to verify the proper instantiation, connectivity and control of analog and mixed-signal AMS intellectual property IP, and also as a means to prototype an AMS integrated circuit IC or system-on-chip SOC using behavioral models in place of IP modules yet to […]

Nov
14
2014

5X to 32X faster low-power verification using Palladium XP emulation

Key findings: 5X to 32X faster low-power verification using Palladium XP emulation It’s hot in July in Korea, and not just the temperature; the ideas, too. The ideas that flowed at CDNLive Korea were exciting, and that includes a very interesting talk by Jiyeon Park from the System LSI division of Samsung Electronics.  His talk, […]

Oct
15
2014

Cadence Protium – Rapid Prototyping Platform, Customer Success Video

Using a traditional FPGA-based prototyping solution, PMC experienced system bring-up times that lasted from a week to two months. To speed up the process, while also using their existing Cadence® Palladium® XP environment, PMC migrated to the Cadence Rapid Prototyping Platform. Now, they can bring up a system in as little as a week and […]

Oct
11
2014

S2C Announces AXI-4 Prototype Ready Quick Start Kit

The Quick Start Kit adapts a Xilinx Zynq ZC702 Evaluation Board to an S2C TAI Logic Module. The evaluation board supplies a Zynq device containing an ARM dual-core Cortex™-A9 CPU and a programmable logic capacity of 1.3M gates. The Quick Start Kit expands this capacity by extending the AXI-4 bus onboard the Zynq chip to […]

Oct
11
2014

ARM Achieves 50X Faster OS Boot-Up on Mali GPU Development using Cadence Palladium XP Platform with ARM Fast Models

Cadence Palladium Hybrid solution enabled 10X speed-up in hardware-software co-development and reduced OS boot-up to test time from hours to minutes SAN JOSE, Calif., 01 Oct 2014 Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that ARM® utilized Cadence® Palladium® Hybrid technology and ARM Fast Models to achieve […]

Oct
11
2014

S2C Accelerates FPGA-based Prototype Development with TAI Player Pro Version 5.1

S2C Inc., a SAN JOSE, Calif. based company  recently announced the release of TAI Player Pro version 5.1. This latest release helps to accelerate prototype development, increase engineering productivity, and achieve the maximum performance from your prototype. “The new version of TAI Player Pro enhances the power and capability of our entire line,” said Toshio Nakama, […]



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